The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 20, 2015

Filed:

Aug. 30, 2013
Applicants:

Qualcomm Incorporated, San Diego, CA (US);

Industry-academic Cooperation Foundation, Seoul, KR;

Inventors:

Seong-Ook Jung, Seoul, KR;

Taehui Na, Seoul, KR;

Jisu Kim, Seoul, KR;

Jung Pill Kim, San Diego, CA (US);

Seung Hyuk Kang, San Diego, CA (US);

Assignees:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01); G11C 11/16 (2006.01); G11C 7/06 (2006.01); G11C 13/00 (2006.01);
U.S. Cl.
CPC ...
G11C 11/1673 (2013.01); G11C 7/06 (2013.01); G11C 7/065 (2013.01); G11C 13/004 (2013.01); G11C 11/1693 (2013.01); G11C 2013/0054 (2013.01); G11C 2013/0057 (2013.01);
Abstract

An offset canceling dual stage sensing method includes sensing a data value of a resistive memory data cell using a first load PMOS gate voltage generated by a reference value of a resistive memory reference cell in a first stage operation. The method also includes sensing the reference value of the resistive memory reference cell using a second load PMOS gate voltage generated by the data value of the resistive memory data cell in a second stage operation of the resistive memory sensing circuit. By adjusting the operating point of the reference cell sensing, an offset canceling dual stage sensing circuit increases the sense margin significantly compared to that of a conventional sensing circuit.


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