The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 20, 2015

Filed:

Jan. 27, 2012
Applicants:

Sagi Varghese Mathai, Berkeley, CA (US);

Michael Renne Ty Tan, Menlo Park, CA (US);

Wayne Victor Sorin, Mountain View, CA (US);

Paul Kessler Rosenberg, Sunnyvale, CA (US);

Georgios Panotopoulos, Berkeley, CA (US);

Susant K Patra, Palo Alto, CA (US);

Inventors:

Sagi Varghese Mathai, Berkeley, CA (US);

Michael Renne Ty Tan, Menlo Park, CA (US);

Wayne Victor Sorin, Mountain View, CA (US);

Paul Kessler Rosenberg, Sunnyvale, CA (US);

Georgios Panotopoulos, Berkeley, CA (US);

Susant K Patra, Palo Alto, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02B 6/42 (2006.01); H01L 31/0232 (2014.01);
U.S. Cl.
CPC ...
G02B 6/423 (2013.01); G02B 6/4204 (2013.01); G02B 6/4212 (2013.01); G02B 6/4249 (2013.01); G02B 6/4259 (2013.01); G02B 6/4279 (2013.01); G02B 6/4292 (2013.01); H01L 31/02325 (2013.01);
Abstract

A glass-silicon wafer stacked platform. The platform includes a plurality of silicon pillars defining a ferrule receptacle, a silicon spacer connected to bases of the pillars and enclosing an aperture, a glass wafer bonded to the spacer, a microlens array formed in a first surface of the glass wafer and located in the aperture, conductive material carried by a second surface of the glass wafer, and contacts in electrical communication with the conductive material.


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