The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 13, 2015

Filed:

Dec. 14, 2012
Applicant:

Stmicroelectronics International N.v., Amsterdam, NL;

Inventors:

Abhishek Jain, Delhi, IN;

Chittoor Parthasarathy, Greater Noida, IN;

Kallol Chatterjee, Kolkata, IN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01); H03K 19/003 (2006.01);
U.S. Cl.
CPC ...
H03K 19/003 (2013.01); G06F 17/5045 (2013.01); G06F 2217/12 (2013.01);
Abstract

Disclosed is a system and method for providing a critical path replica system in a circuit. A critical path replica system is created by determining a critical path in a circuit, generating a critical path replica circuit, generating a circuit blueprint, and creating the blueprinted circuit. The circuit comprises a functional logic module having functional logic elements and replica logic modules having logic elements. Each logic element is configured to replicate one or more of the functional logic elements and process a test signal. A replica error detection module analyzes the processed signal to determine whether a timing violation has occurred. In some embodiments, the replica logic module further comprises one or more load modules. A replica controller may modify operation of the circuit based on reported errors. A replica mode select module sets the replica logic module to an aging test mode or a timing sensor mode.


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