The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 13, 2015

Filed:

May. 05, 2011
Applicants:

Wei Cao, San Jose, CA (US);

Witold Kula, Sunnyvale, CA (US);

Inventors:

Wei Cao, San Jose, CA (US);

Witold Kula, Sunnyvale, CA (US);

Assignee:

Headway Technologies, Inc., Milpitas, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 43/10 (2006.01); H01L 43/08 (2006.01); G11C 11/16 (2006.01); H01L 43/12 (2006.01); H01F 41/30 (2006.01); B82Y 40/00 (2011.01); H01F 10/187 (2006.01); H01F 10/32 (2006.01);
U.S. Cl.
CPC ...
H01L 43/10 (2013.01); B82Y 40/00 (2013.01); G11C 11/161 (2013.01); H01F 10/3295 (2013.01); H01F 41/303 (2013.01); H01L 43/08 (2013.01); H01L 43/12 (2013.01); H01F 10/187 (2013.01); H01F 10/3254 (2013.01); H01F 10/3272 (2013.01);
Abstract

A magnetic tunneling junction (MTJ) in an MRAM array is disclosed with a composite free layer having a FL1/FL2/FL3 configuration where FL1 and FL2 are crystalline magnetic layers and FL3 is an amorphous NiFeX layer for improved bit switching performance. FL1 layer is CoFe which affords a high magnetoresistive (MR) ratio when forming an interface with a MgO tunnel barrier. FL2 is Fe to improve switching performance. NiFeX thickness where X is Hf is preferably between 20 to 40 Angstroms to substantially reduce bit line switching current and number of shorted bits. Annealing at 330° C. to 360° C. provides a high MR ratio of 190%. Furthermore, low Hc and Hk are simultaneously achieved with improved bit switching performance and fewer shorts without compromising other MTJ properties such as MR ratio. As a result of high MR ratio and lower bit-to-bit resistance variation, higher reading margin is realized.


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