The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 13, 2015

Filed:

Jun. 06, 2015
Applicant:

Shenzhen China Star Optoelectronics Technology Co., Ltd., Shenzhen, Guangdong, CN;

Inventor:

Tsungying Yang, Guangdong, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 27/32 (2006.01); H01L 51/56 (2006.01); H01L 51/52 (2006.01); H01L 29/786 (2006.01);
U.S. Cl.
CPC ...
H01L 27/3248 (2013.01); H01L 29/78603 (2013.01); H01L 29/78672 (2013.01); H01L 51/5206 (2013.01); H01L 51/56 (2013.01); H01L 2227/323 (2013.01);
Abstract

A method is provided for manufacturing an anode connection structure of an organic light-emitting diode. The anode connection structure includes: a thin-film transistor and an anode of an organic light-emitting diode arrange don the thin-film transistor. The thin-film transistor includes a low-temperature poly-silicon layer formed on a substrate, a gate insulation layer formed on the low-temperature poly-silicon layer, a gate formed on the gate insulation layer, a protection layer formed on the gate, and a source/drain formed on the protection layer. The method includes a step of forming a hole in the thin-film transistor to expose the low-temperature poly-silicon layer and a step of forming an electrically conductive layer in the hole for direct engagement with the low-temperature poly-silicon layer to serve as an anode and also the source/drain of the thin-film transistor. The anode of the organic light-emitting diode is thus directly connected to the low-temperature poly-silicon layer.


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