The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 13, 2015
Filed:
Jun. 01, 2012
Applicants:
Sang-wook Park, Hwaseong-si, KR;
Kwang-yong Lee, Anyang-si, KR;
Ho-geon Song, Suwon-si, KR;
Inventors:
Assignee:
SAMSUNG ELECTRONICS CO., LTD., Suwon-Si, Gyeonggi-Do, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/28 (2006.01); H01L 21/78 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 24/03 (2013.01); H01L 24/05 (2013.01); H01L 2224/02319 (2013.01); H01L 2224/02331 (2013.01); H01L 2224/02375 (2013.01); H01L 2224/02377 (2013.01); H01L 2224/02379 (2013.01); H01L 2224/03003 (2013.01); H01L 2224/03334 (2013.01); H01L 2224/05548 (2013.01); H01L 2224/05554 (2013.01); H01L 2224/05567 (2013.01); H01L 2224/05639 (2013.01); H01L 2224/05647 (2013.01); H01L 2224/05655 (2013.01); H01L 2224/0603 (2013.01); H01L 2224/06153 (2013.01); H01L 2924/01327 (2013.01); H01L 2924/1461 (2013.01); H01L 2924/15787 (2013.01); H01L 2924/15788 (2013.01);
Abstract
A method of fabricating a semiconductor device includes preparing a semiconductor substrate having a circuit unit on an upper surface thereof, a metal pad electrically connected to the circuit unit, and a passivation layer that covers the circuit unit and exposes the metal pad, forming a first re-wiring layer that is electrically connected to the metal pad and is formed by a printing method to extend from the metal pad on the passivation layer and forming a second re-wiring layer on the first re-wiring layer using the first re-wiring layer as a seed by using an electro-plating process.