The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 13, 2015

Filed:

Dec. 24, 2013
Applicant:

Fujitsu Semiconductor Limited, Yokohama-shi, Kanagawa, JP;

Inventor:

Kenta Kato, Seto, JP;

Assignee:

SOCIONEXT INC., Yokohama, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 5/00 (2006.01); G11C 5/14 (2006.01); H03K 19/00 (2006.01); H03K 19/0175 (2006.01); G11C 7/12 (2006.01); G11C 8/08 (2006.01); G11C 16/12 (2006.01); H01L 27/088 (2006.01);
U.S. Cl.
CPC ...
G11C 5/147 (2013.01); G11C 7/12 (2013.01); G11C 8/08 (2013.01); G11C 16/12 (2013.01); H03K 19/00 (2013.01); H03K 19/017509 (2013.01); H01L 27/088 (2013.01);
Abstract

A switching circuit includes a first well and a second well formed in a semiconductor substrate; a first transistor being connected with a first node at one end, and the first transistor being formed in the first well; a second transistor being connected with another end of the first node at one end, and connected with a second node at another end, and the second transistor being formed in the second well; and a potential control circuit that connects the second well with the first node during a predetermined period including a period for the first transistor and the second transistor to transition from off to on in a state where potential of the second node is lower than potential of the first node, and connects the second well with the second node after the predetermined period.


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