The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 13, 2015

Filed:

May. 03, 2010
Applicants:

Keyur Chudgar, Santa Clara, CA (US);

Vinay Ravuri, Cupertino, CA (US);

Loc Nhin Ho, San Jose, CA (US);

Inventors:

Keyur Chudgar, Santa Clara, CA (US);

Vinay Ravuri, Cupertino, CA (US);

Loc Nhin Ho, San Jose, CA (US);

Assignee:

Applied Micro Circuits Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 9/46 (2006.01); G06F 13/00 (2006.01); G06F 9/50 (2006.01); G06F 13/28 (2006.01);
U.S. Cl.
CPC ...
G06F 13/00 (2013.01); G06F 9/5083 (2013.01); G06F 13/28 (2013.01); G06F 2213/0038 (2013.01);
Abstract

A system and method are provided for evenly distributing central processing unit (CPU) packet processing workloads. The method accepts packets for processing at a port hardware module port interface. The port hardware module supplies the packets to a direct memory access (DMA) engine for storage in system memory. The port hardware module also supplies descriptors to a mailbox. Each descriptor identifies a corresponding packet. The mailbox has a plurality of slots, and loads the descriptors into empty slots. There is a plurality of CPUs, and each CPU fetches descriptors from assigned slots in the mailbox. Then, each CPU processes packets in the system memory in the order in which the associated descriptors are fetched. A load balancing module estimates each CPU workload and reassigns mailbox slots to CPUs in response to unequal CPU workloads.


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