The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 13, 2015

Filed:

Jun. 30, 2008
Applicants:

Sehat Sutardja, Los Altos Hills, CA (US);

Hong-yi Chen, Fremont, CA (US);

Premanand Sakarda, Acton, MA (US);

Mark N. Fullerton, Austin, TX (US);

Jay Heeb, Gilbert, AZ (US);

Inventors:

Sehat Sutardja, Los Altos Hills, CA (US);

Hong-Yi Chen, Fremont, CA (US);

Premanand Sakarda, Acton, MA (US);

Mark N. Fullerton, Austin, TX (US);

Jay Heeb, Gilbert, AZ (US);

Assignee:

Marvell World Trade LTD., St. Michael, BB;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 15/76 (2006.01); G06F 1/32 (2006.01); G06F 9/30 (2006.01); G06F 9/38 (2006.01); G06F 9/46 (2006.01); G06F 9/48 (2006.01);
U.S. Cl.
CPC ...
G06F 1/3203 (2013.01); G06F 1/329 (2013.01); G06F 1/3287 (2013.01); G06F 1/3293 (2013.01); G06F 9/3017 (2013.01); G06F 9/30174 (2013.01); G06F 9/30189 (2013.01); G06F 9/38 (2013.01); G06F 9/3885 (2013.01); G06F 9/461 (2013.01); G06F 9/4856 (2013.01); G06F 9/4893 (2013.01); Y02B 60/121 (2013.01); Y02B 60/1278 (2013.01); Y02B 60/1282 (2013.01); Y02B 60/144 (2013.01); Y02B 60/162 (2013.01); Y02B 60/32 (2013.01);
Abstract

A core switching system includes a mode switching module that receives a switch signal to switch operation between a first mode and a second mode. During the first mode, instructions associated with applications are executed by a first asymmetric core, and a second asymmetric core is inactive. During the second mode, the instructions are executed by the second asymmetric core, and the first asymmetric core is inactive. A core activation module stops processing of the applications by the first asymmetric core after interrupts are disabled. A state transfer module transfers a state of the first asymmetric core to the second asymmetric core. The core activation module allows the second asymmetric core to resume execution of the instructions and the interrupts are enabled.


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