The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 06, 2015
Filed:
Dec. 18, 2014
SK Hynix Inc., Icheon, KR;
Industry-academic Cooperation Foundation, Yonsei University, Seoul, KR;
Dong-Hoon Jung, Seoul, KR;
Jin-Hyuk Kim, Jeollabuk-do, KR;
Kyung-Ho Ryu, Seoul, KR;
Seong-Ook Jung, Seoul, KR;
Byoung-Chan Oh, Seoul, KR;
SK Hynix Inc., Icheon, KR;
Industry-Academic Cooperation Foundation, Yonsei University, Seoul, KR;
Abstract
A delay locked loop includes a variable delay line circuit configured to delay a pulse selection circuit output to generate an output signal, a delay model circuit to delay the output signal to generate a first feedback signal, a first phase comparator circuit to control the variable delay line circuit according to the input signal and the first feedback signal, a pulse generation circuit to generate a pulse signal according to the input signal and the first feedback signal, a pulse retainer circuit to delay the output signal to generate a second feedback signal, a pulse selection circuit to select the pulse signal generated by the pulse generation circuit or the second feedback signal as the pulse selection circuit output during the tracking operation, and a second phase comparator circuit to control the variable delay line circuit according to the pulse selection circuit output and the output signal.