The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 06, 2015
Filed:
Oct. 07, 2011
Distributed power conditioning with dc-dc converters implemented in heterogeneous integrated circuit
Jeffrey H. Saunders, Andover, MA (US);
Michael G. Adlerstein, Wellesley, MA (US);
Jeffrey H. Saunders, Andover, MA (US);
Michael G. Adlerstein, Wellesley, MA (US);
RAYTHEON COMPANY, Waltham, MA (US);
Abstract
A flat panel active electronically scanned array (AESA) () includes heterogeneous integrated circuit DC-DC voltage converters () periodically placed on array elements (). A heterogeneous integrated circuit () includes a voltage converter () configured to receive an input voltage (V), and to convert the input voltage to an output voltage (V) that is different from the input voltage, the voltage converter () comprising an analog and/or digital PWM circuit (). The heterogeneous integrated circuit () also includes a feedback circuit () configured to receive the output voltage (V), and to generate a control signal used to vary a pulse width of a PWM signal generated by the analog and/or digital PWM circuit (). The digital PWM circuit () is implemented in a heterogeneous integrated circuit () fabricated on a common substrate () using CMOS and GaN fabrication processes.