The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 06, 2015

Filed:

Sep. 06, 2013
Applicant:

Cisco Technology, Inc., San Jose, CA (US);

Inventors:

Michael B. Galles, Los Altos, CA (US);

Hemant M. Vinchure, San Jose, CA (US);

Assignee:

CISCO TECHNOLOGY, INC., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/38 (2006.01); G06F 13/40 (2006.01); H04L 29/12 (2006.01);
U.S. Cl.
CPC ...
G06F 13/385 (2013.01); G06F 13/409 (2013.01); G06F 13/4022 (2013.01); H04L 29/12367 (2013.01); G06F 2213/0026 (2013.01); G06F 2213/0058 (2013.01); G06F 2213/3808 (2013.01);
Abstract

Methods and systems are disclosed herein for providing a universal PCIe port. In one example, the same port is configured to accept a PCIe connection as a host or an endpoint symmetrically. Downstream transactions towards an endpoint can be intercepted and a virtual address in the downstream transaction can be translated to a local address using a mapping. The downstream transactions can be forwarded to the endpoint using the local address instead of the virtual address. For endpoints that share the same local address with multiple hosts, a reverse lookup may be provided to determine which one of the hosts a local address corresponds when forwarding upstream transactions. PCIe over Ethernet is provided as one embodiment for allowing remote PCIe endpoints to be associated with a local host transparently.


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