The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 29, 2015

Filed:

Mar. 26, 2013
Applicant:

Jds Uniphase Corporation, Milpitas, CA (US);

Inventors:

Emmanuelle Marie Josèphe Janz, Dunrobin, CA;

Luc Chouinard, Ottawa, CA;

David George Coomber, Nepean, CA;

Assignee:

JDS UNIPHASE CORPORATION, Milpitas, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04L 12/24 (2006.01); H04L 12/939 (2013.01); H04L 12/56 (2006.01);
U.S. Cl.
CPC ...
H04L 41/0809 (2013.01); H04L 41/082 (2013.01); H04L 49/555 (2013.01);
Abstract

Devices and methods for partially upgrading a programmable pluggable transceiver that is in service using the regular datapaths without degrading the basic transparent, hitless pass-through functionality of the transceiver. The programmable logic gate array can be divided into four generalized parts: core logic for basic transceiver pass-through functionality over the datapaths, upgradeable internal logic, connectivity logic for selectively outputting on the datapaths from the core and internal logics, and control logic for isolating, upgrading and reconnecting the internal logic without affecting the basic transparent hitless pass-through functionality of the transceiver.


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