The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 29, 2015

Filed:

Mar. 13, 2014
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Ajit Sharma, Dallas, TX (US);

Seung Bae Lee, Atlanta, GA (US);

Srinath M. Ramaswamy, Murphy, TX (US);

Sriram Narayanan, Richardson, TX (US);

Arup Polley, Richardson, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/06 (2006.01); H03M 1/12 (2006.01); H03M 1/36 (2006.01); H03M 1/44 (2006.01); H03M 1/00 (2006.01);
U.S. Cl.
CPC ...
H03M 1/0675 (2013.01); H03M 1/1245 (2013.01); H03M 1/36 (2013.01); H03M 1/44 (2013.01); H03M 1/00 (2013.01); H03M 1/12 (2013.01);
Abstract

An analog-to-digital converter (ADC) includes a first comparator, a second comparator, and a decision timing comparison logic unit. The first comparator is configured to output a first output voltage and the second comparator is configured to output a second output voltage during a same binary algorithmic iteration of the ADC. The decision timing comparison logic unit is configured to identify a first polarity of the first output voltage and a second polarity of the second output voltage and, if the first polarity is equivalent to a second polarity, to insert at least one redundant capacitor for a next binary algorithmic iteration of the ADC.


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