The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 29, 2015

Filed:

Apr. 08, 2014
Applicants:

Amit Aggarwal, Ghaziabad, IN;

Himanshu Goel, Ghaziabad, IN;

Ashish Malhotra, Noida, IN;

Ankit Pal, Greater Noida, IN;

Inventors:

Amit Aggarwal, Ghaziabad, IN;

Himanshu Goel, Ghaziabad, IN;

Ashish Malhotra, Noida, IN;

Ankit Pal, Greater Noida, IN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/08 (2006.01); H03K 3/017 (2006.01);
U.S. Cl.
CPC ...
H03L 7/08 (2013.01); H03K 3/017 (2013.01);
Abstract

An integrated circuit (IC) includes multiple circuit modules that have specific clocking requirements, multiple clock sources (e.g., PLLs, duty cycle re-shaper, etc.), and at least one clock input port. The clock sources have specific clock source specifications, and the circuit modules have specific clocking requirements. The clock sources are selected based on an identification of the most common clocking requirements, and then placed at routing distances measured from the input port that are less than corresponding predetermined maximum routing distances such that the clocking requirements of the circuit modules are met. The IC thus generates clock signals internally, rather than externally.


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