The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 29, 2015

Filed:

Nov. 29, 2013
Applicant:

National Taiwan University, Taipei, TW;

Inventors:

Chih-Chung Yang, Taipei, TW;

Chun-Han Lin, Taipei, TW;

Chia-Ying Su, Taipei, TW;

Horng-Shyang Chen, Taipei, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 33/20 (2010.01); H01L 33/12 (2010.01); H01L 33/32 (2010.01);
U.S. Cl.
CPC ...
H01L 33/20 (2013.01); H01L 33/12 (2013.01); H01L 33/32 (2013.01);
Abstract

A semiconductor device including a Si (110) substrate, a buffer layer, a first type doped semiconductor layer, a light-emitting layer and a second type doped semiconductor layer is provided. The Si (110) substrate has a plurality of trenches. Each trench at least extends along a first direction, and the first direction is parallel to a <1-10> crystal direction of the Si (110) substrate. The buffer layer is located on the Si (110) substrate and exposes the trenches. The first type doped semiconductor layer is located on the buffer layer and covers the trenches. The light-emitting layer is located on the first type doped semiconductor layer. The second type doped semiconductor layer is located on the light-emitting layer. A fabrication method of a semiconductor device is also provided.


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