The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 29, 2015

Filed:

Nov. 09, 2012
Applicants:

Boe Technology Group Co., Ltd., Beijing, CN;

Hefei Boe Optoelectronics Technology Co., Ltd., Anhui, CN;

Inventor:

Yunbok Lee, Beijing, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 27/12 (2006.01); G02F 1/1362 (2006.01);
U.S. Cl.
CPC ...
H01L 27/124 (2013.01); H01L 27/1259 (2013.01); H01L 27/1288 (2013.01); G02F 1/136227 (2013.01); G02F 2001/136231 (2013.01);
Abstract

The present disclosure relates to an array substrate and the manufacturing method thereof, and a display apparatus. The manufacturing method of the array substrate comprises following step. A gate insulating layer and an active layer is formed on the substrate with said gate electrode and said common electrode formed thereon. A source drain layer is formed on the substrate with said gate insulating layer and said active layer formed thereon. A passivation layer is formed on the substrate with said source drain layer formed thereon, and a through hole is formed in the passivation layer; a pixel electrode is formed on the substrate with said passivation layer formed thereon with said through hole. The pixel electrode is connected to the drain electrode in the source drain layer through said through hole. The process for forming the pixel electrode comprises first etching, ashing and second etching.


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