The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 29, 2015
Filed:
Nov. 09, 2010
Method of forming an insulator layer in a semiconductor structure and structures resulting therefrom
Applicant:
Michael D. Church, Sebastian, FL (US);
Inventor:
Michael D. Church, Sebastian, FL (US);
Assignee:
Intersil Americas LLC, Milpitas, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/8232 (2006.01); H01L 21/8234 (2006.01); H01L 27/06 (2006.01); H01L 27/08 (2006.01); H01L 27/088 (2006.01);
U.S. Cl.
CPC ...
H01L 21/823462 (2013.01); H01L 21/823468 (2013.01); H01L 27/0629 (2013.01); H01L 27/0805 (2013.01); H01L 27/088 (2013.01);
Abstract
An electronic system, method of manufacture of a semiconductor structure, and one or more semiconductor structures are disclosed. For example, a method of manufacture of a semiconductor structure is disclosed, which includes forming a first semiconductor substructure over a semiconductor substrate, forming a first spacer layer over the first semiconductor substructure and the semiconductor substrate, and forming a second semiconductor substructure over at least a portion of the first spacer layer.