The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 29, 2015

Filed:

Dec. 19, 2011
Applicants:

Jinbo Cao, Rexford, NY (US);

Bastiaan Arie Korevaar, Schenectady, NY (US);

George Theodore Dalakos, Niskayuna, NY (US);

Aharon Yakimov, Niskayuna, NY (US);

Scott D. Feldman-peabody, Golden, CO (US);

Dalong Zhong, Niskayuna, NY (US);

Juan Carlos Rojo, Niskayuna, NY (US);

Inventors:

Jinbo Cao, Rexford, NY (US);

Bastiaan Arie Korevaar, Schenectady, NY (US);

George Theodore Dalakos, Niskayuna, NY (US);

Aharon Yakimov, Niskayuna, NY (US);

Scott D. Feldman-Peabody, Golden, CO (US);

Dalong Zhong, Niskayuna, NY (US);

Juan Carlos Rojo, Niskayuna, NY (US);

Assignee:

First Solar, Inc., Tempe, AZ (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 31/0296 (2006.01); H01L 21/477 (2006.01); H01L 31/18 (2006.01); H01L 31/0392 (2006.01);
U.S. Cl.
CPC ...
H01L 21/477 (2013.01); H01L 31/03925 (2013.01); H01L 31/1828 (2013.01); H01L 31/1864 (2013.01); Y02E 10/543 (2013.01);
Abstract

A method of manufacturing semiconductor assemblies is provided. The manufacturing method includes thermally processing a first semiconductor assembly comprising a first semiconductor layer disposed on a first support and thermally processing a second semiconductor assembly comprising a second semiconductor layer disposed on a second support. The first and second semiconductor assemblies are thermally processed simultaneously, and the first and second semiconductor assemblies are arranged such that the first semiconductor layer faces the second semiconductor layer during the thermal processing.


Find Patent Forward Citations

Loading…