The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 29, 2015

Filed:

Nov. 05, 2012
Applicant:

Marvell International Ltd., Hamilton, BM;

Inventors:

Chih-Ching Chen, Milpitas, CA (US);

Hyunsuk Shin, San Jose, CA (US);

Chi Kong Lee, Fremont, CA (US);

Siu-Hung Frederick Au, Fremont, CA (US);

Jungil Park, San Jose, CA (US);

Fei Sun, Santa Clara, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/22 (2006.01); G11C 29/00 (2006.01);
U.S. Cl.
CPC ...
G06F 11/2268 (2013.01); G11C 29/88 (2013.01);
Abstract

The present disclosure includes systems and techniques relating to management of bit line errors based on a stored set of data. In some implementations, a system can include a device including non-volatile solid state memory and a memory controller. The memory controller can be configured to identify, from the solid state memory of the device, one or more bit line errors for the device upon power up of the system, construct a set of data corresponding to the one or more bit line errors for the device, store the set of data, at least in part, in the device, and, upon a subsequent power up of the system, identify the one or more bit line errors for the device from the stored set of data.


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