The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 29, 2015

Filed:

Nov. 18, 2013
Applicant:

Linear Algebra Technologies Limited, Dublin, IE;

Inventors:

David Moloney, Dublin, IE;

Richard Richmond, Belfast, GB;

David Donohoe, Ontario, CA;

Brendan Barry, Dublin, IE;

Cormac Brick, Dublin, IE;

Ovidiu Andrei Vesa, Timisoara, RO;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 15/80 (2006.01); G06F 15/167 (2006.01); G06F 9/38 (2006.01);
U.S. Cl.
CPC ...
G06F 9/3885 (2013.01);
Abstract

The present application relates generally to a parallel processing device. The parallel processing device can include a plurality of processing elements, a memory subsystem, and an interconnect system. The memory subsystem can include a plurality of memory slices, at least one of which is associated with one of the plurality of processing elements and comprises a plurality of random access memory (RAM) tiles, each tile having individual read and write ports. The interconnect system is configured to couple the plurality of processing elements and the memory subsystem. The interconnect system includes a local interconnect and a global interconnect.


Find Patent Forward Citations

Loading…