The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 29, 2015

Filed:

Apr. 20, 2011
Applicants:

BO Wei, Singapore, SG;

Steven Tianchye Cheok, Singapore, SG;

Yongpeng Chng, Singapore, SG;

Cheeseng Toh, Singapore, SG;

Inventors:

Bo Wei, Singapore, SG;

Steven TianChye Cheok, Singapore, SG;

YongPeng Chng, Singapore, SG;

CheeSeng Toh, Singapore, SG;

Assignee:

SEAGATE TECHNOLOGY LLC, Cupertino, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 3/06 (2006.01); G06F 12/02 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0613 (2013.01); G06F 3/064 (2013.01); G06F 3/0619 (2013.01); G06F 3/0647 (2013.01); G06F 3/0676 (2013.01); G06F 12/0292 (2013.01);
Abstract

A mapping table is modified to match one or more specified storage conditions of data stored in or expected to be stored in one or more logical block address ranges to physical addresses within a storage drive having performance characteristics that satisfy the specified storage conditions. For example, the performance characteristics may be a reliability of the physical location within the storage drive or a data throughput range of read/write operations. Existing data is moved and/or new data is written to physical addresses on the storage media possessing the performance characteristic(s), according to the mapping table. Further, a standard seeding or a seeding override for the re-mapped logical block addresses can prevent read operations from inadvertently reading incorrect physical addresses corresponding to the re-mapped logical block addresses.


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