The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 22, 2015

Filed:

Aug. 26, 2013
Applicant:

Olympus Corporation, Tokyo, JP;

Inventor:

Susumu Yamazaki, Tokyo, JP;

Assignee:

OLYMPUS CORPORATION, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/50 (2006.01); H03M 1/56 (2006.01); H03M 1/34 (2006.01); H04N 5/378 (2011.01); H03M 1/14 (2006.01); H03M 1/12 (2006.01);
U.S. Cl.
CPC ...
H03M 1/34 (2013.01); H03M 1/14 (2013.01); H04N 5/378 (2013.01); H03M 1/123 (2013.01); H03M 1/56 (2013.01);
Abstract

An AD conversion circuit includes: a comparison unit that receives an analog signal and a reference signal, compares voltages of the signals, and outputs a first comparison signal; a signal generation unit that outputs a second comparison signal for switching a logic state, and outputs a third comparison signal that is a result of a logic operation on the first comparison signal and the second comparison signal; a control unit that outputs an enable signal; a clock generation unit that outputs first to nclock signals having different phases; a latch unit that includes first to nlatch units, each of the first to nlatch units including an input terminal, a first control terminal, a second control terminal, and an output terminal, and latches a logic state of the one of the first to nclock signals; and a count unit that performs a count operation.


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