The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 22, 2015

Filed:

Sep. 05, 2013
Applicant:

Shanghai Tianma Micro-electronics Co., Ltd., Shanghai, CN;

Inventors:

Zhongshou Huang, Shanghai, CN;

Jun Xia, Shanghai, CN;

Wenwen Xiao, Shanghai, CN;

Libo Jin, Shanghai, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01T 1/17 (2006.01); G01T 1/24 (2006.01); H01L 27/02 (2006.01); H02H 9/04 (2006.01);
U.S. Cl.
CPC ...
H02H 9/04 (2013.01); G01T 1/17 (2013.01); G01T 1/24 (2013.01); H01L 27/0266 (2013.01); H01L 27/0296 (2013.01);
Abstract

An ESD protection system includes an ESD leakage bus and an ESD protection circuit having one of its terminals connected to the ESD leakage bus. The ESD protection circuit includes at least a pair of amorphous silicon thin film transistors which are connected in a back-to-back manner, and a first shading layer is provided over the channels of the pair of amorphous silicon thin film transistors. When the ESD protection system is applied to an X-ray flat panel detector, no photocurrent will occur during the use of the X-ray flat panel detector, the effect of the photocurrent on the voltage of the scan line is reduced. Further, when the first shading layer is connected to a negative fixed potential, it can be ensured that the ESD protection circuit has small threshold voltage while the leakage current in the ESD protection circuit is reduced, and power consumption is reduced.


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