The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 22, 2015

Filed:

Oct. 17, 2014
Applicant:

Hamamatsu Photonics K.k., Hamamatsu-shi, Shizuoka, JP;

Inventors:

Yoshimaro Fujii, Hamamatsu, JP;

Fumitsugu Fukuyo, Hamamatsu, JP;

Kenshi Fukumitsu, Hamamatsu, JP;

Naoki Uchiyama, Hamamatsu, JP;

Assignee:

HAMAMATSU PHOTONICS K.K., Hamamatsu-shi, Shizuoka, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 21/78 (2006.01); H01L 21/768 (2006.01); B23K 26/00 (2014.01); B23K 26/06 (2014.01); B23K 26/40 (2014.01); B28D 5/00 (2006.01); H01L 21/304 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 21/78 (2013.01); B23K 26/0057 (2013.01); B23K 26/063 (2013.01); B23K 26/4075 (2013.01); B28D 5/00 (2013.01); B28D 5/0011 (2013.01); H01L 21/304 (2013.01); H01L 21/76894 (2013.01); H01L 23/562 (2013.01);
Abstract

A substrate dividing method which can thin and divide a substrate while preventing chipping and cracking from occurring. This substrate dividing method comprises the steps of irradiating a semiconductor substratehaving a front faceformed with functional deviceswith laser light while positioning a light-converging point within the substrate, so as to form a modified region including a molten processed region due to multiphoton absorption within the semiconductor substrate, and causing the modified region including the molten processed region to form a starting point region for cutting; and grinding a rear faceof the semiconductor substrateafter the step of forming the starting point region for cutting such that the semiconductor substrateattains a predetermined thickness.


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