The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 22, 2015

Filed:

Jun. 23, 2014
Applicant:

Raytheon Company, Waltham, MA (US);

Inventors:

Premjeet Chahal, Gurnee, IL (US);

Francis J. Morris, Dallas, TX (US);

Assignee:

RAYTHEON COMPANY, Waltham, MA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); H01L 21/56 (2006.01); B81B 7/00 (2006.01); H01L 21/768 (2006.01); H01L 23/10 (2006.01); H01L 23/538 (2006.01); H01L 49/02 (2006.01);
U.S. Cl.
CPC ...
H01L 21/56 (2013.01); B81B 7/007 (2013.01); H01L 21/76898 (2013.01); H01L 23/10 (2013.01); H01L 23/5384 (2013.01); H01L 28/40 (2013.01); B81B 2207/096 (2013.01); H01L 2224/16225 (2013.01); H01L 2924/01079 (2013.01); H01L 2924/1423 (2013.01); H01L 2924/1461 (2013.01); H01L 2924/3011 (2013.01);
Abstract

A method for forming an integrated circuit includes transforming at least a portion of a first substrate layer to form a conductive region within the first substrate layer. An integrated circuit device is provided proximate an outer surface of the first substrate layer. The integrated circuit device transmits or receives electrical signals through the conductive region. A second substrate layer is disposed proximate to the outer surface of the first substrate layer to enclose the integrated circuit device in a hermetic environment.


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