The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 15, 2015

Filed:

Oct. 19, 2011
Applicant:

Keiichi Maeda, Kanagawa, JP;

Inventor:

Keiichi Maeda, Kanagawa, JP;

Assignee:

SONY CORPORATION, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/146 (2006.01); H01L 21/768 (2006.01); H01L 23/48 (2006.01); H01L 23/552 (2006.01); H01L 25/065 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1469 (2013.01); H01L 21/76898 (2013.01); H01L 23/481 (2013.01); H01L 23/552 (2013.01); H01L 25/0657 (2013.01); H01L 27/1464 (2013.01); H01L 27/14634 (2013.01); H01L 27/14636 (2013.01); H01L 27/14621 (2013.01); H01L 27/14627 (2013.01); H01L 2225/06513 (2013.01); H01L 2225/06541 (2013.01); H01L 2924/0002 (2013.01);
Abstract

A solid-state imaging device includes an imaging element and a logic element. The imaging element includes a first semiconductor substrate, a first wiring layer, and a first metal layer, in which a pixel region which is a light sensing surface is formed. The logic element includes a second semiconductor substrate, a second wiring layer, and a second metal layer, in which a signal processing circuit that processes a pixel signal obtained at the pixel region is formed. The logic element is laminated to the imaging element so that the first metal layer and the second metal layer are bonded to each other, and the first metal layer and the second metal layer are formed on a region excluding a region in which a penetrating electrode layer penetrating a bonding surface of the imaging element and the logic element is formed.


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