Mos transistors having low offset values, electronic devices including the same, and methods of fabricating the same

Abstract

A MOS transistor includes a gate electrode disposed over an active region without overlapping with an isolation region, the active region including a channel region, the isolation region defining the active region, a source region and a drain region disposed in first and second portions of the active region, respectively, the first and second portions being disposed at first and second sides of the gate electrode, respectively, the first side opposing the second side, a first blocking region disposed in a third portion of the active region between a third side of the gate electrode and the isolation region and between the source and the drain region, and a second blocking region disposed in a fourth portion of the active region between a fourth side of the gate electrode and the isolation region and between the source and the drain region, the fourth side opposing the third side.