The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 15, 2015
Filed:
Dec. 23, 2012
Gabriel H. Loh, Bellevue, WA (US);
Bradford M. Beckmann, Redmond, WA (US);
James M. O'connor, Austin, TX (US);
Michael Ignatowski, Austin, TX (US);
Michael J. Schulte, Austin, TX (US);
Lisa R. Hsu, Kirkland, WA (US);
Nuwan S. Jayasena, Sunnyvale, CA (US);
Gabriel H. Loh, Bellevue, WA (US);
Bradford M. Beckmann, Redmond, WA (US);
James M. O'Connor, Austin, TX (US);
Michael Ignatowski, Austin, TX (US);
Michael J. Schulte, Austin, TX (US);
Lisa R. Hsu, Kirkland, WA (US);
Nuwan S. Jayasena, Sunnyvale, CA (US);
Advanced Micro Devices, Inc., Sunnyvale, CA (US);
Abstract
A die-stacked memory device incorporates a data translation controller at one or more logic dies of the device to provide data translation services for data to be stored at, or retrieved from, the die-stacked memory device. The data translation operations implemented by the data translation controller can include compression/decompression operations, encryption/decryption operations, format translations, wear-leveling translations, data ordering operations, and the like. Due to the tight integration of the logic dies and the memory dies, the data translation controller can perform data translation operations with higher bandwidth and lower latency and power consumption compared to operations performed by devices external to the die-stacked memory device.