The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 08, 2015
Filed:
Aug. 07, 2013
Applicant:
Ecole Polytechnique Federale DE Lausanne (Epfl), Lausanne, CH;
Inventors:
Luca Gaetano Amaru, Le Mont sur Lausanne, CH;
Pierre-Emmanuel Julien Marc Gaillardon, Renens, CH;
Giovanni De Micheli, Lausanne, CH;
Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/21 (2006.01); H03K 19/23 (2006.01); H03K 17/687 (2006.01); H03K 19/20 (2006.01);
U.S. Cl.
CPC ...
H03K 19/23 (2013.01); H03K 17/687 (2013.01); H03K 19/20 (2013.01); H03K 19/215 (2013.01);
Abstract
A logic gate with three inputs A, B, and C, and one output implementing a function MAJ(A,B,C)=A*B+B*C+A*C comprising two mutually exclusive transmission gates (TGs) connected in series, based on two parallel double-gate controllable polarity devices, a polarity of each being controlled by input A and a conduction being controlled by input B, or vice-versa, in opposite polarities, and that route either an input A or C from one side of the transmission gates to the output.