The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 08, 2015
Filed:
Nov. 18, 2010
Rainer Marquardt, Ottobrunn/Riemerling, DE;
Rainer Marquardt, Ottobrunn/Riemerling, DE;
Siemens Aktiengesellschaft, Munich, DE;
Abstract
A submodule of a high-voltage inverter has a first sub-unit with a first energy storage device, a first series circuit of two power semiconductor switching units connected in parallel with the first energy storage device, each including a switchable power semiconductor, having the same pass-through direction, and each being conductive opposite the nominal pass-through direction. A first connection terminal is connected to the potential point between the power semiconductor switching units of the first series circuit. A second sub-unit has a second energy storage device, a second series circuit of two power semiconductor switching units connected in parallel with the second energy storage device, each including a switchable power semiconductor, having the same pass-through direction, and each being conductive opposite the nominal pass-through direction. A second connection terminal is connected to the potential point between the power semiconductor switching units of the second series circuit, limiting short circuit currents quickly, reliably, and effectively in case of a fault. The first and second sub-units are connected to each other by connections designed such that a current flow between the first connection terminal and the second connection terminal in both directions takes place only via the first energy storage device and/or the second energy storage device in a selected switching state of all power semiconductor switching units.