The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 08, 2015
Filed:
Jun. 08, 2012
Applicant:
Kouichi Nagai, Kawasaki, JP;
Inventor:
Kouichi Nagai, Kawasaki, JP;
Assignee:
FUJITSU SEMICONDUCTOR LIMITED, Yokohama, JP;
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/4763 (2006.01); H01L 23/48 (2006.01); H01L 27/115 (2006.01); H01L 23/532 (2006.01); H01L 27/06 (2006.01); H01L 49/02 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 27/11509 (2013.01); H01L 23/53238 (2013.01); H01L 23/53295 (2013.01); H01L 24/05 (2013.01); H01L 27/0629 (2013.01); H01L 27/11502 (2013.01); H01L 28/55 (2013.01); H01L 2924/07802 (2013.01); H01L 2924/13091 (2013.01);
Abstract
A method for manufacturing a semiconductor device including a semiconductor substrate having transistors formed thereon, a first interlayer insulating film formed above the semiconductor substrate and the transistors, a ferroelectric capacitor formed above the first interlayer insulating film, a second interlayer insulating film formed above the first interlayer insulating film and the ferroelectric capacitor, a first metal wiring formed on the second interlayer insulating film, and a protection film formed on an upper surface of the wiring but not on a side surface of the wiring.