The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 08, 2015

Filed:

Dec. 07, 2011
Applicant:

Hirokazu Sayama, Kanagawa, JP;

Inventor:

Hirokazu Sayama, Kanagawa, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/8234 (2006.01); H01L 27/088 (2006.01); H01L 27/092 (2006.01); H01L 21/8238 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0922 (2013.01); H01L 21/823814 (2013.01); H01L 21/823857 (2013.01); H01L 21/823892 (2013.01);
Abstract

A semiconductor device in which a reliable high voltage p-channel transistor is formed without an increase in cost and the number of manufacturing steps. The transistor includes: a semiconductor substrate having a main surface and a p-type region therein; a p-type well region located over the p-type region and in the main surface, having a first p-type impurity region to obtain a drain electrode; an n-type well region adjoining the p-type well region along the main surface and having a second p-type impurity region to obtain a source electrode; a gate electrode between the first and second p-type impurity regions along the main surface; and a p-type buried channel overlying the n-type well region and extending along the main surface. The border between the n-type and p-type well regions is nearer to the first p-type impurity region than the gate electrode end near to the first p-type impurity region.


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