The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 08, 2015

Filed:

May. 24, 2013
Applicant:

SK Hynik Memory Solutions Inc., San Jose, CA (US);

Inventors:

Arunkumar Subramanian, San Jose, CA (US);

Frederick K. H. Lee, Mountain View, CA (US);

Jason Bellorado, San Jose, CA (US);

Xiangyu Tang, San Jose, CA (US);

Lingqi Zeng, Turlock, CA (US);

Assignee:

SK hynix memory solutions inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/32 (2006.01); G11C 7/00 (2006.01);
U.S. Cl.
CPC ...
G06F 1/3206 (2013.01); G06F 1/32 (2013.01); G06F 1/3225 (2013.01); G06F 1/3234 (2013.01); G06F 1/3275 (2013.01); G06F 1/3287 (2013.01); G11C 7/00 (2013.01); Y02B 60/1225 (2013.01); Y02B 60/1228 (2013.01);
Abstract

A read back bit sequence and charge constraint information are obtained. A lower bound on a number of bit errors associated with the read back bit sequence is determined based at least in part on the read back bit sequence and the charge constraint information. The lower bound and an error correction capability threshold associated with an error correction decoder are compared. In the event the lower bound is greater than or equal to the error correction capability threshold, an error correction decoding failure is predicted and in response to the prediction a component is configured to save power.


Find Patent Forward Citations

Loading…