The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 08, 2015

Filed:

May. 17, 2013
Applicant:

Silicon Motion Inc., Hsinchu County, TW;

Inventor:

Ying-Chen Lin, New Taipei, TW;

Assignee:

Silicon Motion Inc., Jhubei, Hsinchu County, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/12 (2006.01); H04L 7/033 (2006.01); H04L 7/04 (2006.01);
U.S. Cl.
CPC ...
G06F 1/12 (2013.01); H04L 7/033 (2013.01); H04L 7/042 (2013.01);
Abstract

A method and apparatus for performing clock extraction are provided. The method includes: performing edge analysis on a Training Sequence Equalization (TSEQ) pattern carried by a set of received signals that are received from a Universal Serial Bus (USB) port of an electronic device, to dynamically generate a plurality of analysis results; and performing frequency calibration on a frequency of an output clock of a Numerically Controlled Oscillator (NCO) according to a frequency that different types of analysis results within the plurality of analysis results alternatively occur, to utilize the output clock as a reference clock after completing the frequency calibration. More particularly, the method further includes: generating a set of de-multiplexed signals respectively corresponding to a plurality of bits, to perform the edge analysis by comparing respective voltage levels of de-multiplexed signals corresponding to every two adjacent bits of the plurality of bits within the set of de-multiplexed signals.


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