The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 08, 2015

Filed:

Mar. 07, 2013
Applicant:

Xilinx, Inc., San Jose, CA (US);

Inventors:

Donnacha Lowney, Dublin, IE;

Marites De La Torre, Dublin, IE;

Assignee:

XILINX, INC., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 31/28 (2006.01); H01L 21/66 (2006.01); H01L 25/065 (2006.01); G01R 31/3185 (2006.01);
U.S. Cl.
CPC ...
G01R 31/2896 (2013.01); G01R 31/31855 (2013.01); H01L 22/34 (2013.01); H01L 25/0657 (2013.01); H01L 2224/16225 (2013.01); H01L 2924/15192 (2013.01); H01L 2924/15311 (2013.01);
Abstract

An apparatus with package integrity monitoring capability, includes: a package having a die connected to an interposer through a plurality of bumps, wherein at least some of the bumps comprise dummy bumps; a package integrity monitor having a transmitter to transmit a test signal and a receiver to receive the test signal; and a first scan chain comprising a plurality of alternating interconnects in the die and in the interposer connecting some of the dummy bumps in series, wherein the first scan chain has a first end coupled to the transmitter of the package integrity monitor and a second end coupled to the receiver of the package integrity monitor.


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