The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 08, 2015

Filed:

Mar. 16, 2012
Applicant:

Toshiyuki Yamagishi, Tokyo, JP;

Inventor:

Toshiyuki Yamagishi, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/26 (2014.01); G01R 31/28 (2006.01); G01R 31/317 (2006.01);
U.S. Cl.
CPC ...
G01R 31/2884 (2013.01); G01R 31/31726 (2013.01);
Abstract

According to one embodiment, there is provided a semiconductor integrated circuit including an on-chip measurement circuit. The measurement circuit includes a buffer line, a ring oscillator, a first measurement unit measuring a duty cycle of a periodic pulse output from the buffer line, and a second measurement unit measuring a frequency of a periodic pulse output from the ring oscillator. The buffer line including a plurality of delay elements connected in series. Each of the plurality of delay elements includes a former-stage inverter unit including a PMOS transistor and an NMOS transistor and having a first delay amount, and a latter-stage inverter unit including a PMOS transistor and an NMOS transistor and having a second delay amount different from the first delay amount.


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