The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 01, 2015

Filed:

Jan. 28, 2013
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Song S Shi, San Diego, CA (US);

Pengfei Li, San Diego, CA (US);

Lennart Karl-Axel Mathe, San Diego, CA (US);

Assignee:

QUALCOMM, Inc., San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02M 3/158 (2006.01); H03G 1/00 (2006.01); H02M 1/088 (2006.01); H02M 1/36 (2007.01); H02M 1/00 (2007.01);
U.S. Cl.
CPC ...
H03G 1/0005 (2013.01); H02M 1/088 (2013.01); H02M 3/158 (2013.01); H02M 2001/0045 (2013.01); H02M 2001/0058 (2013.01);
Abstract

Techniques for reducing ringing arising from L-C coupling in a boost converter circuit during a transition from a boost ON state to a boost OFF state. In an aspect, during an OFF state of the boost converter circuit, the size of the high-side switch coupling a boost inductor to the load is gradually increased over time. In this manner, the on-resistance of the high-side switch is decreased from a first value to a second (lower) value over time, which advantageously reduces ringing (due to high quality factor or Q) when initially entering the OFF state, while maintaining low conduction losses during the remainder of the OFF state. Further techniques are provided for implementing the high-side switch as a plurality of parallel-coupled transistors.


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