The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 01, 2015
Filed:
Nov. 12, 2012
Applicant:
Sumitomo Bakelite Co., Ltd., Tokyo, JP;
Inventors:
Assignee:
SUMITOMO BAKELITE CO., LTD., Tokyo, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 23/00 (2006.01); H01L 25/065 (2006.01); H01L 25/07 (2006.01); H01L 25/18 (2006.01);
U.S. Cl.
CPC ...
H01L 24/96 (2013.01); H01L 24/75 (2013.01); H01L 24/81 (2013.01); H01L 25/065 (2013.01); H01L 25/07 (2013.01); H01L 25/18 (2013.01); H01L 2224/16145 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/81203 (2013.01); H01L 2924/10253 (2013.01);
Abstract
Provided is a method of manufacturing a semiconductor device that has a plurality of semiconductor components and a plurality of resin layers, the method including: a step in which resin layers and semiconductor components are laminated alternately on a substrate, and the same is adhered by being subjected to heating and pressurization at a temperature lower than the temperature at which the substrate and/or a solder layer of the semiconductor components melts; and a step in which heat and pressure are applied at a temperature at which the solder layer melts or a temperature higher than said temperature.