The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 01, 2015

Filed:

Jul. 28, 2014
Applicants:

Boe Technology Group Co., Ltd., Beijing, CN;

Beijing Boe Display Technology Co., Ltd., Beijing, CN;

Inventors:

Zhenyu Zhang, Beijing, CN;

Xibin Shao, Beijing, CN;

Yanping Liao, Beijing, CN;

Yoon Dae Keun, Beijing, CN;

Dan Wang, Beijing, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/14 (2006.01); H01L 29/04 (2006.01); H01L 29/15 (2006.01); H01L 31/036 (2006.01); H01L 27/12 (2006.01); H01L 21/768 (2006.01); H01L 23/522 (2006.01); G02F 1/1368 (2006.01); G02F 1/1362 (2006.01); G02F 1/1333 (2006.01); G02F 1/1343 (2006.01);
U.S. Cl.
CPC ...
H01L 27/124 (2013.01); G02F 1/1368 (2013.01); G02F 1/13439 (2013.01); G02F 1/133345 (2013.01); G02F 1/136286 (2013.01); H01L 21/768 (2013.01); H01L 23/5226 (2013.01); H01L 27/1259 (2013.01); G02F 2001/13629 (2013.01); G02F 2001/136295 (2013.01);
Abstract

An array substrate is disclosed. The array substrate comprises a substrate, a plurality of common electrodes formed on the substrate, a plurality of gate signal lines formed above the common electrodes, and a plurality of common electrode signal line units corresponding to the plurality of common electrodes, respectively. The plurality of common electrode signal line units are formed on the corresponding common electrodes, respectively. Each of the common electrode signal line units comprises a first common electrode signal line perpendicular to the gate signal line and a second common electrode signal line parallel to the gate signal line. The first and second common electrode signal lines are made of metal and cross with each other and are electrically connected to each other. Two adjacent common electrode signal line units are electrically connected by a bridge line. The present disclosure also relates to a method for manufacturing the array substrate and a display apparatus.


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