The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 01, 2015
Filed:
Feb. 24, 2014
Jianan Yang, Austin, TX (US);
James D. Burnett, Austin, TX (US);
Brad J. Garni, Austin, TX (US);
Thomas W. Liston, Austin, TX (US);
Jianan Yang, Austin, TX (US);
James D. Burnett, Austin, TX (US);
Brad J. Garni, Austin, TX (US);
Thomas W. Liston, Austin, TX (US);
Other;
Abstract
A semiconductor device includes a parasitic silicon-controlled rectifier (SCR) and a first transistor. The parasitic SCR includes a parasitic pnp bipolar junction transistor (BJT) and a parasitic npn BJT. The first transistor is coupled between a first power supply node and an emitter of the parasitic pnp BJT. The first transistor includes a first terminal coupled to the first power supply node, a second terminal coupled to the emitter of the parasitic pnp BJT, and a control terminal. The first transistor is not positioned between a base of the pnp BJT and the first power supply node. The first transistor limits current conducted by the parasitic pnp BJT following a single-event latch-up (SEL) event.