The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 01, 2015

Filed:

Jun. 03, 2013
Applicant:

SK Hynix Inc., Icheon-si Gyeonggi-do, KR;

Inventors:

Young-Suk Moon, Icheon-si, KR;

Hyung-Dong Lee, Yongin Si, KR;

Yong-Kee Kwon, Seoul, KR;

Hong-Sik Kim, Seongnam-si, KR;

Hyung-Gyun Yang, Icheon-si, KR;

Assignee:

SK Hynix Inc., Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01); G06F 11/07 (2006.01); G06F 12/00 (2006.01); G06F 12/08 (2006.01); G11C 7/02 (2006.01); G11C 7/10 (2006.01); G11C 11/406 (2006.01); G11C 11/408 (2006.01);
U.S. Cl.
CPC ...
G06F 11/073 (2013.01); G06F 11/004 (2013.01); G06F 12/00 (2013.01); G06F 12/0804 (2013.01); G11C 7/02 (2013.01); G11C 7/1006 (2013.01); G11C 11/4085 (2013.01); G11C 11/40603 (2013.01); G06F 2212/3042 (2013.01);
Abstract

A semiconductor device includes a controller configured to control a first memory device to process a request for the first memory device and a second memory device. The controller receives the request for the first memory device, determines a data damage risk of cells connected to a second signal line adjacent to a first signal line of the first memory device corresponding to a requested address by referring to information indicating a data damage risk, and stores data of the cells connected to the second signal line in the second memory device when determining that there is a data damage risk.


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