The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 01, 2015

Filed:

Jun. 19, 2012
Applicants:

Duk-sung Kim, Asan-si, KR;

Hyuk-jin Kim, Asan-si, KR;

Young Jae Tak, Yongin-si, KR;

Inventors:

Duk-Sung Kim, Asan-si, KR;

Hyuk-Jin Kim, Asan-si, KR;

Young Jae Tak, Yongin-si, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G02F 1/1345 (2006.01); G06F 3/038 (2013.01); H01L 27/12 (2006.01); H01L 29/40 (2006.01);
U.S. Cl.
CPC ...
G06F 3/038 (2013.01); G02F 1/1345 (2013.01); H01L 27/124 (2013.01);
Abstract

A thin film transistor display panel capable of minimizing a bezel and a manufacturing method thereof are provided. The thin film transistor display panel includes: a substrate; a plurality of gate lines and data lines that cross each other on the substrate; a thin film transistor connected to the gate line and the data line; a pixel electrode connected to the thin film transistor; and a plurality of gate voltage supply lines arranged in a parallel direction with the data lines and connected to the plurality of gate lines, respectively, in which one pixel area is defined by two adjacent gate lines and two adjacent data lines, two pixel electrodes are formed in one pixel area, and the gate voltage supply lines pass between the two pixel electrodes formed in the same pixel area.


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