The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 25, 2015

Filed:

Jan. 08, 2014
Applicant:

Lg Innotek Co., Ltd., Seoul, KR;

Inventors:

Jeong Hyeon Choi, Seoul, KR;

Hyun Kyong Cho, Seoul, KR;

Bock Kee Min, Seoul, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 33/00 (2010.01); H01L 33/60 (2010.01); H01L 33/38 (2010.01); H01L 33/64 (2010.01); H01L 33/62 (2010.01); H01L 33/10 (2010.01); H01L 33/20 (2010.01); H01L 33/22 (2010.01); H01L 33/44 (2010.01);
U.S. Cl.
CPC ...
H01L 33/60 (2013.01); H01L 33/10 (2013.01); H01L 33/382 (2013.01); H01L 33/62 (2013.01); H01L 33/64 (2013.01); H01L 33/20 (2013.01); H01L 33/22 (2013.01); H01L 33/44 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48247 (2013.01); H01L 2933/0016 (2013.01);
Abstract

A light emitting device may be provided that includes a conductive support member, a first conductive layer, a second conductive layer, an insulation layer between the first conductive layer and the second conductive layer, and a light emitting structure that includes a second semiconductor layer on the second conductive layer, a first semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer. The first conductive layer may include at least one conductive via that passes through the second conductive layer, the second semiconductor layer and the active layer. A top surface of the at least one conductive via is provided into the first semiconductor layer. The insulation layer may substantially surround a side wall of the conductive via.


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