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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9117942 B1

PDFFull Text
Date of Patent:
Aug. 25, 2015

Filed:

Nov. 24, 2014

Electronic device and electronic device manufacturing method

Applicant:

Panasonic Corporation, Osaka, JP;

Inventors:

Akihito Miyamoto, Osaka, JP;

Yuko Okumoto, Osaka, JP;

Assignee:

PANASONIC CORPORATION, Osaka, JP;

Attorney:

Greenblum & Bernstein, P.L.C.

Primary Examiner:

Nicholas Tobergte

Int. Cl.
CPC ...
H01L 29/08 (2006.01); H01L 21/00 (2006.01); H01L 51/40 (2006.01); H01L 33/00 (2010.01); H01L 29/786 (2006.01); H01L 33/36 (2010.01); H01L 51/00 (2006.01); H01L 51/52 (2006.01); H01L 51/56 (2006.01); H01L 51/05 (2006.01); H01L 51/10 (2006.01);
U.S. Cl.
CPC ...
H01L 33/005 (2013.01); H01L 29/786 (2013.01); H01L 33/0041 (2013.01); H01L 33/36 (2013.01); H01L 51/0004 (2013.01); H01L 51/0021 (2013.01); H01L 51/0558 (2013.01); H01L 51/105 (2013.01); H01L 51/5203 (2013.01); H01L 51/56 (2013.01); H01L 51/0545 (2013.01); H01L 51/5296 (2013.01); H01L 2933/0016 (2013.01); Y02B 20/343 (2013.01);
Abstract

An electronic device including: a substrate; a bank formed above the substrate; a semiconductor layer formed within an aperture surrounded by the bank; and electrodes electrically connected to the semiconductor layer. An outline of the aperture in plan view includes a first straight edge, a second straight edge continuous with one end of the first edge via a first connector, and a straight third edge continuous with the other end of the first edge via a second connector. The area of a first connector region differs from the area of a second connector region, the first connector region being defined by a first imaginary straight line along the first edge, a second imaginary straight line along the second edge, and the first connector, and the second connector region being defined by a third imaginary straight line along the third edge, the first imaginary straight line, and the second connector.

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