The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 25, 2015

Filed:

May. 13, 2014
Applicant:

Rohm Co., Ltd., Kyoto, JP;

Inventors:

Kazumasa Tanida, Chiba, JP;

Osamu Miyata, Kyoto, JP;

Assignee:

ROHM CO., LTD., Kyoto, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/52 (2006.01); H01L 29/40 (2006.01); H01L 23/31 (2006.01); H01L 21/56 (2006.01); H01L 51/52 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/3185 (2013.01); H01L 21/563 (2013.01); H01L 23/52 (2013.01); H01L 24/28 (2013.01); H01L 23/3142 (2013.01); H01L 24/01 (2013.01); H01L 51/5246 (2013.01); H01L 2224/01 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/26175 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/83102 (2013.01); H01L 2224/92125 (2013.01); H01L 2924/01004 (2013.01); H01L 2924/01006 (2013.01); H01L 2924/01015 (2013.01); H01L 2924/01033 (2013.01); H01L 2924/01075 (2013.01); H01L 2924/153 (2013.01); H01L 2924/183 (2013.01);
Abstract

A semiconductor device () includes a solid state device (), a semiconductor chip () that has a functional surface () on which a functional element () is formed and that is bonded on a surface of the solid state device with the functional surface thereof facing the surface of the solid state device and while maintaining a predetermined distance between the functional surface thereof and the surface of the solid state device, an insulating film () that is provided on the surface () of the solid state device facing the semiconductor chip and that has an opening () greater in size than the semiconductor chip when the surface of the solid state device facing the semiconductor chip is vertically viewed down in plane, and a sealing layer () that seals a space between the solid state device and the semiconductor chip.


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