The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 25, 2015

Filed:

May. 14, 2012
Applicants:

Young-ho Lee, Seoul, KR;

Jae-kwan Park, Gyeonggi-do, KR;

Jae-hwang Sim, Gyeonggi-do, KR;

Sang-yong Park, Gyeonggi-do, KR;

Inventors:

Young-Ho Lee, Seoul, KR;

Jae-Kwan Park, Gyeonggi-do, KR;

Jae-Hwang Sim, Gyeonggi-do, KR;

Sang-Yong Park, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/467 (2006.01); H01L 27/02 (2006.01); H01L 21/033 (2006.01); H01L 21/308 (2006.01); H01L 21/3213 (2006.01); H01L 21/762 (2006.01); H01L 23/544 (2006.01); H01L 27/115 (2006.01); H01L 27/105 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0207 (2013.01); H01L 21/0332 (2013.01); H01L 21/0337 (2013.01); H01L 21/3081 (2013.01); H01L 21/3086 (2013.01); H01L 21/32139 (2013.01); H01L 21/76229 (2013.01); H01L 23/544 (2013.01); H01L 27/1052 (2013.01); H01L 27/11519 (2013.01); H01L 27/11526 (2013.01); H01L 27/11529 (2013.01); H01L 2924/0002 (2013.01); H01L 2924/14 (2013.01);
Abstract

A method of fabricating an integrated circuit device includes forming first and second mask structures on respective first and second regions of a feature layer. Each of the first and second mask structures includes a dual mask pattern and an etch mask pattern thereon having an etch selectivity relative to the dual mask pattern. The etch mask patterns of the first and second mask structures are etched to partially remove the etch mask pattern from the second mask structure. Spacers are formed on opposing sidewalls of the first and second mask structures. The first mask structure is selectively removed from between the spacers in the first region to define a first mask pattern including the opposing sidewall spacers with a void therebetween in the first region, and a second mask pattern including the opposing sidewall spacers with the second mask structure therebetween in the second region.


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