The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 25, 2015
Filed:
Aug. 12, 2013
Spirent Communications, Inc., Sunnyvale, CA (US);
John R. Morris, Simi Valley, CA (US);
Thomas R. McBeath, Calabasas, CA (US);
SPIRENT COMMUNICATIONS, INC., Sunnyvale, CA (US);
Abstract
A time reference system includes a master clock, generating a clock reference, interface logic and a CPU-based subsystem. The interface logic receives the clock reference and generates the clock, pulses, and timestamp signals. The CPU-based subsystem includes an internal counter, a CPU and a clock synthesizer, the CPU and receiving the pulses and timestamp signals. The clock synthesizer receives the clock signal and generates a CPU clock signal. Some examples include an FPGA-based subsystem having an FPGA-based card coupled to the interface logic for receipt of the clock, pulses and timestamp signals. In a method the timestamp value TO is generated by the CPU upon receipt of the timestamp signal. Upon receipt by the CPU of the next pulse signal, a timestamp counter baseline value TSCO is generated so the CPU internal counter is calibrated to the clock signal.