The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 18, 2015
Filed:
Mar. 05, 2013
Applicant:
Renesas Electronics Corporation, Kanagawa, JP;
Inventor:
Hirokazu Sayama, Kanagawa, JP;
Assignee:
Renesas Electronics Corporation, Kanagawa, JP;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 29/66 (2006.01); H01L 29/10 (2006.01); H01L 27/092 (2006.01); H01L 29/06 (2006.01); H01L 21/8238 (2006.01);
U.S. Cl.
CPC ...
H01L 29/78 (2013.01); H01L 21/823814 (2013.01); H01L 27/0922 (2013.01); H01L 29/1083 (2013.01); H01L 29/66477 (2013.01); H01L 29/66659 (2013.01); H01L 29/7835 (2013.01); H01L 21/823807 (2013.01); H01L 29/0692 (2013.01); H01L 29/1087 (2013.01);
Abstract
Provided are a semiconductor device having a high breakdown voltage and attaining the restraint of the action of a parasite bipolar transistor, and a method for producing the device. A high-breakdown-voltage p-channel-type transistor included in the semiconductor device has a first n-type semiconductor layer arranged in a semiconductor substrate and at a main-surface-side (upside) of a p-type region in the semiconductor substrate, and a local n-type buried region arranged just below a first p-type dopant region to contact the first n-type semiconductor layer.