The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 18, 2015

Filed:

Oct. 05, 2012
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventor:

Marco Cassia, San Diego, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02M 3/07 (2006.01); G11C 5/14 (2006.01);
U.S. Cl.
CPC ...
G11C 5/145 (2013.01); G11C 5/147 (2013.01); H02M 3/07 (2013.01); H02M 2003/071 (2013.01); H02M 2003/072 (2013.01); H02M 2003/076 (2013.01);
Abstract

Negative voltage generators that do not require level shifters or AC coupling capacitors are disclosed. In an exemplary design, a negative voltage generator includes first, second, third and fourth switches, a capacitor, and a control circuit. The first switch is coupled between an input node and a first node. The second switch is coupled between the first node and circuit ground. The third switch is coupled between a second node and circuit ground. The fourth switch is coupled between the second node and an output node. The input node receives a positive voltage, and the output node provides a negative voltage. The capacitor is coupled between the first and second nodes. The control circuit (e.g., an inverter) generates a control signal having positive and negative voltage levels for the third switch using a negative voltage level at the second node.


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